Recent demonstrations indicate that silicon-spin QPUs will be able to shuttle physical qubits rapidly and with high fidelity – a desirable feature for maximising logical connectivity, supporting new codes, and routing around damage. However it may seem that shuttling at the logical level is unwise: static defects in the device may scratch' a logical qubit as it passes, causing correlated errors to which the code is highly vulnerable. Here we explore an architecture where logical qubits are 1D strings (snakes’) which can be moved freely over a planar latticework. Possible scratch events are inferred via monitor qubits and the complementary gap; if deemed a risk, remarkably the shuttle process can be undone in a way that negates any corruption. This leads to high levels of tolerance against shuttling-related imperfections, and enables logical operations between snakes by a semi-transversal method. We conclude that this approach is suitable for fault-tolerant computing in both near term and long term, mature-era silicon devices.
